OLED Display can be classified according to its driving method, passive-matrix (PMOLED) and active-matrix (AMOLED). AMOLED uses TFT (Thin Film Transistor) with a capacitor for storing data signals that can control OLED levels of brightness.
Manufacturing procedure of PMOLED is simpler in comparison and is less costly of the two; however, it is limited in its size (<5 inch) because of its driving mode and has a lower-resolution display application. In order to produce an OLED display with higher resolution and larger size, utilizing active-matrix driving is necessary. The so-called AMOLED uses TFT (Thin Film Transistor) with a capacitor for storing data signals, so that pixels can maintain its brightness after line scanning; on the other hand, pixels of passive matrix driving only light up when scan line selects them. Therefore, with active matrix driving, the brightness of OLED is not necessarily ultra-bright, resulting in longer lifetime, higher efficiency and higher resolution. Naturally, TFT-OLED with active matrix driving is suitable for display application of higher resolution and excellent picture due to the unique qualities of OLED.
LTPS (Low Temperature Poly-Silicon) and a-Si (amorphous Silicon) are both technologies of TFT integrating on glass substrate. The obvious differences are electric characteristics and complexity of process. Although LTPS-TFT possesses higher carrier mobility and higher mobility means more current can be supplied, the process is much more complex. However, the process of a-Si TFT is simpler and maturer, except for low carrier mobility. Therefore, a-Si process has better competitive advantages in cost.
Due to limitations of LTPS process capability, threshold voltage and mobility of TFT elements produced vary leading to different properties of each TFT element. When the driving system achieves gray scale by analog voltage modulation, OLED produces different output current despite of the same data voltage signal input due to different TFT characteristics of various pixels. Therefore, luminance of OLED varies. Images of erroneous gray scale will show up on OLED panel and damage image uniformity seriously.
The most urgent problem of AMOLED to be solved currently is how to reduce bad impact of uneven LTPS-TFT characteristics. Such issue requires immediate solution for follow-up development and application since images on the display tell the difference.
U.S. Pat. No. 6,229,506 discloses an Active Matrix Light Emitting Diode Pixel Structure And Concomitant Method. A 4T2C (4 TFTS and 2 capacitors) pixel circuit is proposed as shown in FIG. 4. An Auto-Zero mechanism is applied to compensate for the threshold voltage differences of TFT elements to improve uniformity of images. Driving sequences of control signals include Auto-Zero Phase 510, Load Data Phase 520 and Illuminate Phase 530. Refer to FIG. 5 for the sequences of control signals in FIG. 4.
Transistors T3 and T4 are off and Transistor T2 is on prior to Auto-Zero Phase 510. The current passing through OLED 460 at this moment is current of the previous frame and controlled by Vsg of Transistor T1 (voltage difference between source and gate; i.e., voltage difference of both ends of Cs).
After entering Auto-Zero Phase 510, Transistor T4 is on and then Transistor T3 is on, too so that Drain and Gate of Transistor T1 can be connected as a diode. As Transistor T2 is off, gate voltage of Transistor T1 will increase, which equals to Vdd minus threshold voltage (Vth) of Transistor T1. That is to say, the voltage difference stored at both ends of capacitor Cs is the threshold voltage of Transistor T1. After placing Transistor T3 off, threshold voltage (Vth) of Transistor T1 can be stored into capacitor Cs and Auto-Zero Phase 510 is completed.
On Load Data Phase 520, when voltage difference of Date Line 410 is ÄV, it can couple to the gate of Transistor T1 through Transistor T4 and capacitor Cc. Thus, voltage difference stored at both ends of capacitor Cs will be ÄV×[Cc/(Cc+Cs)] adding Vth that is stored in capacitor Cs previously. That is, Vsg of Transistor T1 includes Vth of Transistor T1, which makes output current of Transistor T1 relate to voltage change (ÄV) of Data Line 410 only, instead of being affected by Vth of transistor in every pixel.
Last when Illuminate Phase 530 begins, Transistor T4 is off and Transistor T2 is on. Output current of Transistor T1 at the present frame will flow through OLED 460 to illuminate.
Though this 4T2C pixel circuit may compensate for the threshold voltage (Vth) differences of transistor elements in each pixel and improve integral uniformity of images; however, other control lines like Auto-Zero Line 430 and Illuminate Line 440 are required in addition to Data Line 410, Scan Line 420 and Supply Line (Vdd) 450. Capacitor Cs has to record all threshold voltages and part of data voltages loaded. Besides, capacitance coupling approach is used to load data, which not only makes driving method more complicated, but also increases manufacturing cost when non-standard data driving IC is required.
To solve the same problem, Philips also published a thesis with the subject of A Comparison of Pixel Circuits for Active Matrix Polymer/Organic LED Displays. One 4T2C pixel circuit is presented in the thesis as FIG. 6 shows. It skillfully changes the location of connecting two capacitors in the pixel circuit of the U.S. Pat. No. 6,229,506 (FIG. 4) to solve the defects causing by complexity and impracticability. However, control lines like Auto-Zero Line 630 and Illuminate Line 640 are also required in addition to Data Line 610, Scan Line 620 and Supply Line (Vdd) 650.
The sequences of driving control signals are the same as the U.S. Pat. No. 6,229,506 since they consist of Auto-Zero Phase 510, Load Data Phase 520 and Illuminate Phase 530. Please refer to FIG. 5 and the sequences of control signals in FIG. 6.
On Auto-Zero Phase 510, Transistor T64 is off and then Transistor T63 is on so that Drain and Gate of Transistor T61 can be connected as a diode. As Transistor T62 is off, gate voltage of Transistor T61 will increase, which equals to Vdd minus threshold voltage (Vth) of Transistor T61. That is to say, the sum of voltage stored at capacitors C1 and C2 is the threshold voltage (Vth) of Transistor T61. After placing Transistor T63 off, Auto-Zero Phase 510 is completed.
Data voltage is conducted through connection of Transistor T64. Data voltage is stored in Capacitor C1 and a certain proportion of Vth previously stored at both ends of Capacitor C2 is still maintained, which equals to [C1/(C1+C2)]×Vth. Thus, the sum of capacitors C1 and C2 is (Vdd−Vdata+[C1/(C1+C2)]×Vth); i.e., Vsg of Transistor T61 contains part of Vth of Transistor T61, which may not only reduce the correlation between the output current and threshold voltage of Transistor T61, but also compensate for part of the threshold voltage (Vth) difference resulted from process factors. The threshold voltage of Transistor T61 in the thesis is memorized by two capacitors (C1 & C2). Part of threshold voltage data stored in one of the capacitors will get lost while loading data voltage. Therefore, this approach can only make up for part of threshold voltage difference resulted from process.